Invention Grant
- Patent Title: Method for manufacturing a semiconductor structure using isolation layers for etching the trenches in a substrate
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Application No.: US17602960Application Date: 2021-07-15
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Publication No.: US12063769B2Publication Date: 2024-08-13
- Inventor: Jinghao Wang , Xin Xin
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: CN 2110240323.8 2021.03.04
- International Application: PCT/CN2021/106516 2021.07.15
- International Announcement: WO2022/183660A 2022.09.09
- Date entered country: 2021-10-11
- Main IPC: H10B12/00
- IPC: H10B12/00 ; H01L23/528

Abstract:
Embodiments of the present disclosure provide a semiconductor structure and a method for manufacturing the same. The manufacturing method includes: providing a substrate and bit line structures on the substrate; forming a first isolation layer, the first isolation layer being located on side walls of the bit line structures and on the substrate; forming a second isolation layer, the second isolation layer covering the first isolation layer located on the side walls of the bit line structures, and exposing the first isolation layer located on the substrate; removing the first isolation layer exposed by the second isolation layer and part of the first isolation layer below the second isolation layer, so that remaining of the first isolation layer is recessed compared to the second isolation layer toward the side walls of the bit line structures to form a groove.
Public/Granted literature
- US20230055202A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2023-02-23
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