Invention Grant
- Patent Title: Timing adjustment for data input/output buffer circuits
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Application No.: US17834754Application Date: 2022-06-07
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Publication No.: US12073868B2Publication Date: 2024-08-27
- Inventor: Noriaki Mochida
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C11/4076
- IPC: G11C11/4076 ; G11C11/4093

Abstract:
Apparatuses including a loopback circuit are disclosed. An example apparatus according to the disclosure includes a plurality of input signal receivers and a loopback circuit coupled to the plurality of input signal receivers. The loopback circuit includes a signal multiplexer and a selector. The signal multiplexer provides an input signal received at one input receiver of the plurality of input receivers as a selected signal. The selector coupled to the signal multiplexer provides a loopback signal based on the selected signal and an alleviation signal that transitions between two different states, periodically.
Public/Granted literature
- US20230395124A1 TIMING ADJUSTMENT FOR DATA INPUT/OUTPUT BUFFER CIRCUITS Public/Granted day:2023-12-07
Information query
IPC分类: