Invention Grant
- Patent Title: Semiconductor device and integrated circuit in hybrid row height structure
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Application No.: US17831108Application Date: 2022-06-02
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Publication No.: US12074069B2Publication Date: 2024-08-27
- Inventor: Jerry Chang-Jui Kao , Hui-Zhong Zhuang , Li-Chung Hsu , Sung-Yen Yeh , Yung-Chen Chien , Jung-Chan Yang , Tzu-Ying Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L23/535
- IPC: H01L23/535 ; H01L21/48 ; H01L21/822 ; H01L23/50
Abstract:
A semiconductor device includes several first cell row an several second cell rows. The first cell rows extend in a first direction. Each of the first cell rows has a first row height. A first row of the first cell rows is configured for a first cell to be arranged. The second cell rows extend in the first direction. Each of the second cell rows has a second row height that is different from the first row height. At least one row of the second cell rows includes a portion for at least one second cell to be arranged. The portion has a third row height that is different from the first row height and the second row height.
Public/Granted literature
- US20220293469A1 SEMICONDUCTOR DEVICE AND INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE Public/Granted day:2022-09-15
Information query
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