A network element includes at least one processor and at least one memory. The at least one non-transitory memory including computer program code configured to, when executed by the at least one processor, cause the apparatus to determine whether a bit error rate (BER) of a FEC codeword is at or below a correctable BER, wherein the FEC codeword is transmitted between an OLT and ONU, a first percentage of the FEC codeword is at a lower order modulation, and a second percentage of the FEC codeword is at a higher order modulation, establish, based on a determination that the BER is at or below the correctable BER, a connection between the OLT and the ONU at the higher order modulation, and maintain, based on a determination that the BER is greater than the correctable BER, the connection between the OLT and the ONU at the lower order modulation.