A semiconductor memory includes first variable resistance layers and insulating layers alternately stacked; conductive pillars passing through the first variable resistance layers and the insulating layers; a slit insulating layer vertically passing through the insulating layers, extending in a first direction, and being disposed in a second direction of the insulating layers, the second direction intersecting with the first direction; conductive layers disposed between the slit insulating layer and the first variable resistance layers; and electrode layers disposed between the conductive layers and the first variable resistance layers. The first variable resistance layers remain in an amorphous state during a program operation.