A display panel includes a driving circuit. The driving circuit includes N levels of shift registers cascaded with each other, N≥2. A shift register of the N levels of the shift registers includes a third control unit and a fourth control unit. The third control unit is configured to receive the first voltage signal and a second voltage signal and control a signal of a fourth node in response to the signal of the second node and a signal of a third node. The first voltage signal is a high-level signal and the second voltage signal is a low-level signal. The fourth control unit is configured to receive a third voltage signal and a fourth voltage signal and generate an output signal in response to the signal of the first node and the signal of the fourth node and includes a first transistor and a second transistor.