Invention Grant
- Patent Title: Electrical fuse bit cell in integrated circuit having backside conducting lines
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Application No.: US18489674Application Date: 2023-10-18
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Publication No.: US12080641B2Publication Date: 2024-09-03
- Inventor: Chien-Ying Chen , Yen-Jen Chen , Yao-Jen Yang , Meng-Sheng Chang , Chia-En Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G11C29/02
- IPC: G11C29/02 ; G11C17/16 ; H01L23/48 ; H01L23/525 ; H10B20/20

Abstract:
An integrated circuit includes a transistor formed in a semiconductor structure, a front-side horizontal conducting line in a first metal layer above the semiconductor structure, and a front-side vertical conducting line in a second metal layer above the first metal layer. The front-side horizontal conducting line is directly connected to a first terminal of the transistor, and the front-side vertical conducting line is directly connected to the front-side horizontal conducting line. In the integrated circuit, a front-side fuse element is conductively connected to the front-side vertical conducting line, and a backside conducting line is directly connected to a second terminal of the transistor. A word connection line extending in the first direction is directly connected to a gate terminal of the transistor.
Public/Granted literature
- US20240047348A1 ELECTRICAL FUSE BIT CELL IN INTEGRATED CIRCUIT HAVING BACKSIDE CONDUCTING LINES Public/Granted day:2024-02-08
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