Invention Grant
- Patent Title: Method to implement wafer-level chip-scale packages with grounded conformal shield
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Application No.: US16368032Application Date: 2019-03-28
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Publication No.: US12080655B2Publication Date: 2024-09-03
- Inventor: Gianni Signorini , Georg Seidemann , Bernd Waidhas
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/48 ; H01L21/78 ; H01L23/31 ; H01L23/498

Abstract:
Embodiments disclosed herein include electronic packages with conformal shields and methods of forming such packages. In an embodiment, the electronic package comprises a die having a first surface, a second surface opposite the first surface, and sidewall surfaces. A redistribution layer is over the first surface of the die, and the redistribution layer comprises a first conductive layer. In an embodiment, an under ball metallization (UBM) layer is over the redistribution layer, and a conductive shield is over the sidewall surfaces of the die and the second surface of the die. In an embodiment, the conductive shield is electrically coupled to the UBM layer.
Public/Granted literature
- US20200312781A1 METHOD TO IMPLEMENT WAFER-LEVEL CHIP-SCALE PACKAGES WITH GROUNDED CONFORMAL SHIELD Public/Granted day:2020-10-01
Information query
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