Invention Grant
- Patent Title: Field effect transistor with fin isolation structure and method
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Application No.: US17463370Application Date: 2021-08-31
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Publication No.: US12080776B2Publication Date: 2024-09-03
- Inventor: Yi-Ruei Jhan , Kuan-Ting Pan , Kuo-Cheng Chiang , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Seed IP Law Group LLP
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L29/417 ; H01L29/66 ; H01L29/78

Abstract:
A device includes a substrate and a fin isolation structure between a first gate structure and a second gate structure. The first gate structure wraps around a first vertical stack of nanostructure channels overlying a first fin. The second gate structure wraps around a second vertical stack of nanostructure channels overlying a second fin. The fin isolation structure extends from an upper surface of the first gate structure to an upper surface of the substrate. A trench isolation structure is between the first fin and the fin isolation structure, and has different etch selectivity than the fin isolation structure.
Public/Granted literature
- US20230060454A1 FIELD EFFECT TRANSISTOR WITH FIN ISOLATION STRUCTURE AND METHOD Public/Granted day:2023-03-02
Information query
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