Invention Grant
- Patent Title: Image sensor having multiple vertical signal lines per column in multiple laminated wiring layers
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Application No.: US17250240Application Date: 2019-05-14
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Publication No.: US12081893B2Publication Date: 2024-09-03
- Inventor: Takafumi Morikawa
- Applicant: C/O SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: CHIP LAW GROUP
- Priority: JP 18124044 2018.06.29
- International Application: PCT/JP2019/019102 2019.05.14
- International Announcement: WO2020/003783A 2020.01.02
- Date entered country: 2020-12-21
- Main IPC: H04N25/78
- IPC: H04N25/78 ; H01L27/146

Abstract:
An image sensor includes a pixel array unit in which pixels are arranged in a matrix, and multiple vertical signal lines provided in pixel column units. The multiple vertical signal lines provided in pixel column units are arranged in multiple wiring layers laminated on the pixel, and are arranged so that orthogonal projections of the vertical signal lines on the multiple wiring layers overlap. The wiring layer is provided with a connection portion for connecting the vertical signal line corresponding to the pixel to the pixel. A pixel signal is taken out from the vertical signal line through the connection portion.
Public/Granted literature
- US20210127081A1 IMAGE SENSOR, IMAGING DEVICE, AND ELECTRONIC DEVICE Public/Granted day:2021-04-29
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