Invention Grant
- Patent Title: Eight-transistor static random access memory, layout thereof, and method for manufacturing the same
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Application No.: US18231029Application Date: 2023-08-07
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Publication No.: US12082388B2Publication Date: 2024-09-03
- Inventor: Shau-Wei Lu , Hao Chang , Kun-Hsi Li , Kuo-Hung Lo , Kang-Yu Hsu , Yao-Chung Hu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: STUDEBAKER & BRACKETT PC
- Main IPC: H10B10/00
- IPC: H10B10/00 ; H01L21/027 ; H01L21/3105 ; H01L21/8238 ; H01L27/02 ; H01L27/092 ; H01L29/08 ; H01L29/10 ; H01L29/36 ; H01L29/49 ; H01L29/66

Abstract:
A Static Random Access Memory (SRAM) cell includes a write port including a first inverter including a first pull-up transistor and a first pull-down transistor, and a second inverter including a second pull-up transistor and a second pull-down transistor and cross-coupled with the first inverter; and a read port including a read pass-gate transistor and a read pull-down transistor serially connected to each. A first doped concentration of impurities doped in channel regions of the second pull-down transistor and the read pull-down transistor is greater than a second doped concentration of the impurities doped in a channel region of the first pull-down transistor, or the impurities are doped in the channel regions of the second pull-down transistor and the read pull-down transistor and are not doped in the channel region of the first pull-down transistor.
Public/Granted literature
- US20230413503A1 EIGHT-TRANSISTOR STATIC RANDOM ACCESS MEMORY, LAYOUT THEREOF, AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2023-12-21
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