A stress sensor includes a semiconductor substrate with a first transistor arrangement and a second transistor arrangement. The first transistor arrangement includes a first transistor with a first source-drain channel region and a second transistor with a second source-drain channel region. The first transistor and the second transistor are aligned relative to each other such that the current flow directions in the first and the second source-drain channel regions are opposite to each other. The second transistor arrangement includes a third transistor with a third source-drain channel region and a fourth transistor with a fourth source-drain channel region. The third transistor and the fourth transistor are aligned relative to each other such that the current flow directions in the third and the fourth source-drain channel regions are opposite to each other. The stress sensor generates a gradient-compensated output signal used to determine a mechanical stress acting on the semiconductor substrate.