Invention Grant
- Patent Title: On-chip debugging device and method
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Application No.: US17594034Application Date: 2019-12-02
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Publication No.: US12085612B2Publication Date: 2024-09-10
- Inventor: Fushan Jia , Rui Jiang , Jicun Zhang
- Applicant: Suzhou Centec Communications Co., Ltd.
- Applicant Address: CN Suzhou
- Assignee: Suzhou Centec Communications Co., Ltd.
- Current Assignee: Suzhou Centec Communications Co., Ltd.
- Current Assignee Address: CN Suzhou
- Agency: Wang Law Firm, Inc.
- Priority: CN 1910288054.5 2019.04.11
- International Application: PCT/CN2019/122393 2019.12.02
- International Announcement: WO2020/207040A 2020.10.15
- Date entered country: 2022-04-20
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G01R31/3185 ; G01R31/3187 ; G06F11/22 ; G06F11/30

Abstract:
An on-chip debugging device and method is provided. The on-chip debugging device includes: an external interface module configured for outputting chip debugging state information to an external debugger and receiving a control instruction of the external debugger; a debugging mode control module configured for setting a to-be-sampled type of a specified chip internal signal and setting a debugging trigger condition according to the debugging configuration of the external debugger or the internal CPU; a debugging monitor module configured for sampling and recording the internal signal of the chip of the specified type so as to identify the running state of the chip; and a debugging information processing module configured for storing the running state of the chip in an internal debugging memory and sending it to the external debugger by the external interface module or sending it to the internal CPU via an internal bus. The on-chip debugging functions which are relatively simple, occupy less resources and have more powerful functions can be realized by the device and the method.
Public/Granted literature
- US20220252665A1 On-chip Debugging Device and Method Public/Granted day:2022-08-11
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