Invention Grant
- Patent Title: Method for forming a device with an extended via semiconductor structure
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Application No.: US17870213Application Date: 2022-07-21
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Publication No.: US12087627B2Publication Date: 2024-09-10
- Inventor: Hung Hsun Lin , Che-Chih Hsu , Wen-Chu Huang , Chinyu Su , Yen-Yu Chen , Wei-Chun Hua , Wen Han Hung
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Seed IP Law Group LLP
- The original application number of the division: US16900567 2020.06.12
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/027 ; H01L21/768 ; H01L23/522 ; H01L23/64 ; H01L23/66 ; H01L49/02

Abstract:
A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.
Public/Granted literature
- US20220367343A1 EXTENDED VIA SEMICONDUCTOR STRUCTURE, DEVICE AND METHOD Public/Granted day:2022-11-17
Information query
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