Invention Grant
- Patent Title: Selective dual silicide formation
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Application No.: US18308952Application Date: 2023-04-28
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Publication No.: US12087642B2Publication Date: 2024-09-10
- Inventor: Wei-Yip Loh , Yan-Ming Tsai , Yi-Ning Tai , Raghunath Putikam , Hung-Yi Huang , Hung-Hsu Chen , Chih-Wei Chang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Harrity & Harrity, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/40 ; H01L29/08 ; H01L29/417 ; H01L29/47

Abstract:
Techniques described herein enable respective (different) types of metal silicide layers to be formed for p-type source/drain regions and n-type source/drain regions in a selective manner. For example, a p-type metal silicide layer may be selectively formed over a p-type source/drain region (e.g., such that the p-type metal silicide layer is not formed over the n-type source/drain region) and an n-type metal silicide layer may be formed over the n-type source/drain region (which may be selective or non-selective). This provides a low Schottky barrier height between the p-type metal silicide layer and the p-type source/drain region, as well as a low Schottky barrier height between the n-type metal silicide layer and the n-type source/drain region. This reduces the contact resistance for both p-type source/drain regions and n-type source/drain regions.
Public/Granted literature
- US20230260847A1 SELECTIVE DUAL SILICIDE FORMATION Public/Granted day:2023-08-17
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