- Patent Title: High voltage isolation barrier with electric overstress integrity
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Application No.: US17730872Application Date: 2022-04-27
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Publication No.: US12087710B2Publication Date: 2024-09-10
- Inventor: Jeffrey A. West
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Yudong Kim; Frank D. Cimino
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L21/78 ; H01L23/522 ; H01L23/528 ; H01L23/60 ; H01L25/065

Abstract:
An electronic device comprises a multilevel metallization structure over a semiconductor layer and including a first region, a second region, a pre-metal level on the semiconductor layer, and N metallization structure levels over the pre-metal level, N being greater than 3. The electronic device also comprises an isolation component in the first region, the isolation component including a first terminal and a second terminal in different respective metallization structure levels, as well as a conductive shield between the first region and the second region in the multilevel metallization structure, the conductive shield including interconnected metal lines and trench vias in the respective metallization structure levels that at least partially encircle the first region.
Public/Granted literature
- US20220254740A1 HIGH VOLTAGE ISOLATION BARRIER WITH ELECTRIC OVERSTRESS INTEGRITY Public/Granted day:2022-08-11
Information query
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