Invention Grant
- Patent Title: Protective wafer grooving structure for wafer thinning and methods of using the same
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Application No.: US18087819Application Date: 2022-12-23
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Publication No.: US12087756B2Publication Date: 2024-09-10
- Inventor: Kuo-Ming Wu , Ming-Che Lee , Hau-Yi Hsiao , Cheng-Hsien Chou , Sheng-Chau Chen , Cheng-Yuan Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/268 ; H01L21/46 ; H01L23/00 ; H01L23/31 ; H01L23/532 ; H01L25/00 ; H01L21/304 ; H01L21/306 ; H01L21/3065 ; H01L21/308

Abstract:
A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.
Public/Granted literature
- US20230129760A1 PROTECTIVE WAFER GROOVING STRUCTURE FOR WAFER THINNING AND METHODS OF USING THE SAME Public/Granted day:2023-04-27
Information query
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