Invention Grant
- Patent Title: Systems and methods for a semiconductor structure having multiple semiconductor-device layers
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Application No.: US16983463Application Date: 2020-08-03
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Publication No.: US12087777B2Publication Date: 2024-09-10
- Inventor: Yi-Tang Lin , Chun-Hsiung Tsai , Clement Hsingjen Wann
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US14074932 2013.11.08
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/762 ; H01L21/8238 ; H01L21/84 ; H01L27/092 ; H01L29/10 ; H01L29/165

Abstract:
A method of fabricating a semiconductor structure having multiple semiconductor device layers is provided. The method comprises providing a bulk substrate and growing a first channel material on the bulk substrate wherein the lattice constant of the first channel material is different from the lattice constant of the bulk substrate to introduce strain to the first channel material. The method further comprises fabricating a first semiconductor device layer on the bulk substrate with the strained first channel material, fabricating a buffer layer comprising dielectric material with a blanket top surface above the first semiconductor layer, bonding to the blanket top surface a bottom surface of a second substrate comprising a buried oxide with a second channel material above the buried oxide, and fabricating a second semiconductor device layer on the second substrate.
Information query
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