Invention Grant
- Patent Title: Crossing multi-stack nanosheet structure and method of manufacturing the same
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Application No.: US18187506Application Date: 2023-03-21
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Publication No.: US12087815B2Publication Date: 2024-09-10
- Inventor: Hwichan Jun , Inchan Hwang , Byounghak Hong
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/088 ; H01L29/40 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
A semiconductor device includes a substrate; a 1st transistor formed above the substrate, and having a 1st transistor stack including a plurality of 1st channel structures, a 1st gate structure surrounding the 1st channel structures, and 1st and 2nd source/drain regions at both ends of the 1st transistor stack in a 1st channel length direction; and a 2nd transistor formed above the 1st transistor in a vertical direction, and having a 2nd transistor stack including a plurality of 2nd channel structures, a 2nd gate structure surrounding the 2nd channel structures, and 3rd and 4th source/drain regions at both ends of the 2nd transistor stack in a 2nd channel length direction, wherein the 3rd source/drain region does not vertically overlap the 1st source/drain region or the 2nd source/drain region, and the 4th source/drain region does not vertically overlap the 1st source/drain region or the 2nd source/drain region.
Public/Granted literature
- US20230231015A1 CROSSING MULTI-STACK NANOSHEET STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2023-07-20
Information query
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