Electronic devices for correcting a duty-cycle of a clock signal are disclosed. An electronic device may include circuitry configured to receive an input clock signal and generate, based on the input clock signal, a number of corrected clock signals. The circuitry may further be configured to generate, via an amplifier of the circuitry, a number of error signals based on the number of corrected clock signals and adjust a duty cycle of the number of corrected clock signals based on the number of error signals. Further, the circuitry may be configured to disable the amplifier in response to determining that the input clock signal is disabled. Associated apparatuses and methods are also disclosed.