Invention Grant
- Patent Title: Nonvolatile memory devices for reducing degradation due to difference of threshold voltage distributions between outer cells and inner cells
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Application No.: US17810777Application Date: 2022-07-05
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Publication No.: US12094535B2Publication Date: 2024-09-17
- Inventor: Eun Chu Oh , Junyeong Seok , Younggul Song
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F. Chau & Associates, LLC
- Priority: KR 20210182556 2021.12.20
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C11/56 ; G11C16/04 ; G11C16/08 ; G11C16/24 ; G11C16/26

Abstract:
A nonvolatile memory device includes a memory cell array and a control circuit. The memory cell array includes a plurality of word-lines, a plurality of memory cells provided in a plurality of channel holes and a word-line cut region extending in a first horizontal direction and dividing the word-lines into a plurality of memory blocks. A plurality of target memory cells coupled to each of the plurality of word-lines are grouped into outer cells and inner cells based on a location index of each of the plurality of memory cells. The control circuit controls a program operation on target memory cells coupled to a target word-line of the plurality of word-lines such that each of the outer cells stores a first number of bits and each of the inner cells stores a second number of bits. The second number is a natural number greater than the first number.
Public/Granted literature
- US20230197158A1 NONVOLATILE MEMORY DEVICES AND STORAGE DEVICES Public/Granted day:2023-06-22
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