Invention Grant
- Patent Title: Integrated circuit structure and method for forming the same
-
Application No.: US17479454Application Date: 2021-09-20
-
Publication No.: US12094930B2Publication Date: 2024-09-17
- Inventor: Guan-Yao Tu , Su-Jen Sung , Tze-Liang Lee , Hong-Wei Chan
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/477 ; H01L23/528 ; H01L29/06 ; H01L29/423 ; H01L29/66 ; H01L29/786

Abstract:
A method includes forming a transistor over a front side of a substrate; forming a front-side interconnect structure over the transistor, the front-side interconnect structure comprising layers of conductive lines, and conductive vias interconnecting the layers of conductive lines; forming a first bonding layer over the front-side interconnect structure; forming a second bonding layer over a carrier substrate; bonding the front-side interconnect structure to the carrier substrate by pressing the first bonding layer against the second bonding layer; and forming a backside interconnect structure over a backside of the substrate after bonding the front-side interconnect structure to the carrier substrate.
Public/Granted literature
- US20220336583A1 INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2022-10-20
Information query
IPC分类: