Invention Grant
- Patent Title: Shielding process for SIP packaging
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Application No.: US17620288Application Date: 2019-12-06
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Publication No.: US12107053B2Publication Date: 2024-10-01
- Inventor: Juncheng Guo , Dewen Tian , Qinglin Song
- Applicant: Weifang Goertek Microelectronics Co., Ltd.
- Applicant Address: CN Shandong
- Assignee: Weifang Goertek Microelectronics Co., Ltd.
- Current Assignee: Weifang Goertek Microelectronics Co., Ltd.
- Current Assignee Address: CN Shandong
- Agency: Baker Botts LLP
- Priority: CN 1910523418.3 2019.06.17
- International Application: PCT/CN2019/123552 2019.12.06
- International Announcement: WO2020/253147A 2020.12.24
- Date entered country: 2021-12-17
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H01L23/552 ; H05K3/28

Abstract:
Disclosed is a shielding process for SIP packaging, including: providing a circuit board; cutting the covering layer to form half-cut trenches separating different SIP packaging modules from each other, and to form grooves in each single SIP packaging module; forming a metal overlay, the metal overlay on an outer surface of the SIP packaging module and at positions where the half-cut trenches are located constituting a conformal shielding, the metal overlay at positions where the grooves are located constituting a compartment shielding; and cutting the half-cut trenches to obtain a plurality of SIP packaging modules that are separate from each other.
Public/Granted literature
- US20220254731A1 SHIELDING PROCESS FOR SIP PACKAGING Public/Granted day:2022-08-11
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