Invention Grant
- Patent Title: Transistor channel passivation with 2D crystalline material
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Application No.: US17517583Application Date: 2021-11-02
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Publication No.: US12107170B2Publication Date: 2024-10-01
- Inventor: Carl Naylor , Abhishek Sharma , Mauro Kobrinsky , Christopher Jezewski , Urusa Alaan , Justin Weber
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/12 ; H01L29/66

Abstract:
Transistor structures with a channel semiconductor material that is passivated with two-dimensional (2D) crystalline material. The 2D material may comprise a semiconductor having a bandgap offset from a band of the channel semiconductor. The 2D material may be a thin as a few monolayers and have good temperature stability. The 2D material may be a conversion product of a sacrificial precursor material, or of a portion of the channel semiconductor material. The 2D material may comprise one or more metal and a chalcogen. The channel material may be a metal oxide semiconductor suitable for low temperature processing (e.g., IGZO), and the 2D material may also be compatible with low temperature processing (e.g.,
Public/Granted literature
- US20220059702A1 TRANSISTOR CHANNEL PASSIVATION WITH 2D CRYSTALLINE MATERIAL Public/Granted day:2022-02-24
Information query
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