Invention Grant
- Patent Title: Three-dimensional integrated circuit structures and methods of forming the same
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Application No.: US18341788Application Date: 2023-06-27
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Publication No.: US12113027B2Publication Date: 2024-10-08
- Inventor: Chung-Yu Lu , Ping-Kang Huang , Sao-Ling Chiu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L21/56 ; H01L23/498 ; H01L25/10 ; H01L23/00

Abstract:
Board substrates, three-dimensional integrated circuit structures and methods of forming the same are disclosed. A board substrate includes a core layer, a first build-up layer, a second build-up layer, a first group of bumps, a second first group of bumps and at least one first underfill blocking wall. The first build-up layer and the second build-up layer are disposed on opposite sides of the core layer. The first group of bumps is disposed over the first build-up layer. The second first group of bumps is disposed over the first build-up layer. The at least one first underfill blocking wall is disposed over the first build-up layer and between the first group of bumps and the second group of bumps.
Public/Granted literature
- US20230335502A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURES AND METHODS OF FORMING THE SAME Public/Granted day:2023-10-19
Information query
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