A method for improving the stability and reducing phase variations of an ultra-wideband attenuator, with respect to temperature variations, comprising the steps of providing an attenuator implemented in π-topology and consisting of a serial path between the input and the output of the attenuator, including a first serial resistor Rs1 connected to the input, followed by a serial inductor Ls, followed by a second serial resistor Rs2 connected to the output; a first transistor T1 bridging between the input and the output, for controlling the impedance of the serial path by a first control input provided to the first transistor T1; a first parallel path between the input and ground, including a first parallel transistor T2a followed by first parallel resistor Rp1; a second parallel path between the output and ground, including a second parallel transistor T2b followed by second parallel resistor Rp2; a second control input commonly provided to first parallel transistor T2a and to the second parallel transistor T2b, for controlling the impedance of the first and second parallel paths; unifying the serial resistors to a common serial resistor Rs and splitting the serial inductor Ls to two serial inductors Ls1 and Ls2, such that one serial inductor is connected between the input and a first contract of the common serial resistor Rs and the other serial inductor is connected between the output and the other contact of the common serial resistor Rs; splitting the parallel resistor Rp1 to two smaller resistors, connecting a first smaller resistor to the input, connecting a second smaller resistor to the first smaller resistor via the first parallel transistor T2a and to ground via a third parallel transistor T3a; splitting the parallel resistor Rp2 to two smaller resistors, connecting a third smaller resistor to the output, connecting a fourth smaller resistor to the third smaller resistor via the second parallel transistor T2b and to ground via a fourth parallel transistor T3b; connecting a first feedback capacitor Cfb1 between the common point connecting between the ungrounded port of the second parallel transistor T3a and the first contract of the common serial resistor Rs and connecting a second feedback capacitor Cfb2 between the common point connecting between the ungrounded port of the fourth parallel transistor T3b and the second contract of the common serial resistor Rs; upon controlling the first and second parallel transistors T2a and T2b by the second control input, simultaneously controlling also the third and the fourth parallel transistors T3a and T3b by the second control input; controlling the first and the second control inputs to obtain a desired attenuation between the input and output of the attenuator.