Invention Grant
- Patent Title: Pixel output parasitic capacitance reduction and predictive settling assist
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Application No.: US17891963Application Date: 2022-08-19
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Publication No.: US12114089B2Publication Date: 2024-10-08
- Inventor: Hai Yan , Chiajen Lee
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Brownstein Hyatt Farber Schreck, LLP
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H04N25/75 ; H04N25/77

Abstract:
Disclosed herein are electronic devices and image sensors containing pixel arrays, layouts of electrical signal lines for such pixel arrays, and methods of pixel read out operations, including row read operations, for such pixel arrays. Layouts are disclosed that have reduced sets of shielding or ground lines. In some layouts, shielding ground lines are used only between pairs of adjacent pixel output signal lines (OSLs). Also disclosed is a method of using one OSL within a pair of adjacent pixel OSLs to provide settling assist of the pixel output signal on the other OSL of the adjacent pair of OSLs.
Public/Granted literature
- US20240064432A1 Pixel Output Parasitic Capacitance Reduction and Predictive Settling Assist Public/Granted day:2024-02-22
Information query
IPC分类: