Invention Grant
- Patent Title: Substrate, method for manufacturing substrate, and electronic device
-
Application No.: US17635756Application Date: 2020-05-26
-
Publication No.: US12114433B2Publication Date: 2024-10-08
- Inventor: Hiroshi Nakano , Norikazu Ozaki
- Applicant: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
- Applicant Address: JP Nagano
- Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
- Current Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
- Current Assignee Address: JP Nagano
- Agency: WHDA, LLP
- Priority: JP 19160202 2019.09.03
- International Application: PCT/JP2020/020644 2020.05.26
- International Announcement: WO2021/044675A 2021.03.11
- Date entered country: 2022-02-16
- Main IPC: H05K3/00
- IPC: H05K3/00 ; H01L23/498 ; H05K1/03 ; H05K1/11 ; H05K3/04 ; H05K3/42

Abstract:
A substrate that enables increasing an allowable current value of a current path in a thickness direction of the substrate and narrowing spaces between multiple current paths, and the like are provided. To solve this subject, a substrate includes a sheet-shaped first base material (1) having a penetrating hole (1B) in the thickness direction and includes a second base material (2) fitted into the penetrating hole (1B). The second base material (2) includes multiple metal bodies (2B). The metal bodies (2B) penetrate in the thickness direction of the first base material (1) in a state of having an end exposed at each of a first surface and a second surface of the second base material (2) that face each other in the thickness direction.
Public/Granted literature
- US20220312595A1 SUBSTRATE, METHOD FOR MANUFACTURING SUBSTRATE, AND ELECTRONIC DEVICE Public/Granted day:2022-09-29
Information query