Invention Grant
- Patent Title: Buried bit line structure, manufacturing method thereof, and semiconductor structure
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Application No.: US17650702Application Date: 2022-02-11
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Publication No.: US12114484B2Publication Date: 2024-10-08
- Inventor: Wei Feng , Jingwen Lu , Bingyu Zhu , Zhaopei Cui
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Syncoda LLC
- Agent Feng Ma
- Priority: CN 2110862614.0 2021.07.29
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H10B12/00

Abstract:
The present disclosure provides a method of manufacturing a buried bit line structure and a buried bit line structure. The method of manufacturing a buried bit line structure includes: providing an initial structure, the initial structure including active region structures; forming an initial bit line trench, the initial bit line trench exposing the active region structure; forming a conductive structure, the conductive structure being located at the bottom of the initial bit line trench; forming a bit line contact structure, the bit line contact structure covering the conductive structure, and a top surface of the bit line contact structure being lower than a top surface of the active region structure; and forming an insulation structure, the insulation structure covering the bit line contact structure.
Public/Granted literature
- US20230032351A1 BURIED BIT LINE STRUCTURE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR STRUCTURE Public/Granted day:2023-02-02
Information query
IPC分类: