Invention Grant
- Patent Title: Top-electrode barrier layer for RRAM
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Application No.: US18331228Application Date: 2023-06-08
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Publication No.: US12114582B2Publication Date: 2024-10-08
- Inventor: Hsing-Lien Lin , Chii-Ming Wu , Fa-Shen Jiang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H10N70/00
- IPC: H10N70/00 ; H10B63/00 ; H10N70/20

Abstract:
Various embodiments of the present application are directed towards a resistive random-access memory (RRAM) cell including a top-electrode barrier layer configured to block the movement of nitrogen or some other suitable non-metal element from a top electrode of the RRAM cell to an active metal layer of the RRAM cell. Blocking the movement of non-metal element may be prevent formation of an undesired switching layer between the active metal layer and the top electrode. The undesired switching layer would increase parasitic resistance of the RRAM cell, such that top-electrode barrier layer may reduce parasitic resistance by preventing formation of the undesired switching layer.
Public/Granted literature
- US20230320241A1 TOP-ELECTRODE BARRIER LAYER FOR RRAM Public/Granted day:2023-10-05
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