Invention Grant
- Patent Title: Interconnect structure and method for forming the same
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Application No.: US18133970Application Date: 2023-04-12
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Publication No.: US12125783B2Publication Date: 2024-10-22
- Inventor: Chung-Liang Cheng , Shih Wei Bih , Yen-Yu Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- The original application number of the division: US16058290 2018.08.08
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/3105 ; H01L21/311 ; H01L21/768 ; H01L21/02

Abstract:
A semiconductor device includes: a first conductive structure having sidewalls and a bottom surface, the first conductive structure extending through one or more isolation layers formed on a substrate; and an insulation layer disposed between at least one of the sidewalls of the first conductive structure and respective sidewalls of the one or more isolation layers, wherein the first conductive structure is electrically coupled to a second conductive structure through at least the bottom surface.
Public/Granted literature
- US20230253309A1 INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2023-08-10
Information query
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