Clock generator and display device including the same
Abstract:
Disclosed is a clock generator including an oscillator configured to output a reference clock signal to a first line, an EMI reduction controller configured to generate an EMI reduction signal offset with the reference clock signal and to output the EMI reduction signal to a second line, and a driving clock generator configured to generate an operation clock based on the reference clock signal, which is one of the reference clock signal input through the first line and the EMI reduction signal input through the second line.
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