Invention Grant
- Patent Title: Method of manufacturing semiconductor devices and semiconductor devices
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Application No.: US17875277Application Date: 2022-07-27
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Publication No.: US12132051B2Publication Date: 2024-10-29
- Inventor: Shahaji B. More , Chandrashekhar Prakash Savant
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: STUDEBAKER & BRACKETT PC
- The original application number of the division: US17184150 2021.02.24
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/8238 ; H01L27/092 ; H01L29/51
Abstract:
A gate structure of a field effect transistor includes a first gate dielectric layer, a second gate dielectric layer, and one or more conductive layers disposed over the first gate dielectric layer and the second gate dielectric layer. The first gate dielectric layer is separated from the second gate dielectric layer by a gap filled with a diffusion blocking layer.
Public/Granted literature
- US20220375937A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES Public/Granted day:2022-11-24
Information query
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