Invention Grant
- Patent Title: DFT architecture for analog circuits
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Application No.: US17592171Application Date: 2022-02-03
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Publication No.: US12135351B2Publication Date: 2024-11-05
- Inventor: Filippo Colombo
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Slater Matsil, LLP
- Main IPC: G01R31/316
- IPC: G01R31/316 ; G01R31/317

Abstract:
An integrated circuit (IC) includes: a first functional analog pin or pad; a first analog test bus coupled to the first functional analog pin or pad; first and second analog circuits coupled to the first analog test bus; and a test controller configured to: when the IC is in a functional operating mode, connect an input or output of the first analog circuit to the first analog test bus so that the input or output of the first analog circuit is accessible by the first functional analog pin or pad, and keep disconnected an input or output of the second analog circuit from the first analog test bus, and when the IC is in a test mode, selectively connect the input or output of the first and second analog circuits to the first analog test bus to test the first and second analog circuits using the first analog test bus.
Public/Granted literature
- US20230243886A1 DFT ARCHITECTURE FOR ANALOG CIRCUITS Public/Granted day:2023-08-03
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