According to one embodiment, a semiconductor memory device includes a staircase portion, a columnar body, and a contact. The columnar body is provided in a second region of a stacked body, penetrating the stacked body in a stacking direction, and having a plurality of memory cells at each positions facing the plurality of conductive layers. The contact is connected to a terrace surface. Further, the staircases included in the staircase portion are each formed to ascend for each first step having conductive layers of the plurality of conductive layers in a second direction intersecting the stacking direction and a first direction. The terrace surfaces arranged in the first direction of the terrace surfaces of the staircases are different in height from each other and are formed to ascend for each second step having one conductive layer of the plurality of conductive layers in the first direction.