A microelectronic device comprises array regions individually comprising memory cells comprising access devices and storage node device, digit lines coupled to the access devices and extending in a first direction, word lines coupled to the access devices and extending in a second direction orthogonal to the first direction, and control logic devices over and in electrical communication with the memory cells. The microelectronic device further comprises capacitor regions horizontally offset from the array regions in the first direction and having a dimension in the second direction greater than each individual array region in the second direction. The capacitor regions individually comprise additional control logic devices vertically overlying the memory cells, and capacitor structures within horizontal boundaries of the additional control logic devices. Related microelectronic devices, electronic systems, and methods are also described.