Invention Grant
- Patent Title: Integrated circuit comprising a non-volatile memory
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Application No.: US17932694Application Date: 2022-09-16
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Publication No.: US12148503B2Publication Date: 2024-11-19
- Inventor: Xavier Lecoq
- Applicant: STMicroelectronics (Grenoble 2) SAS
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Slater Matsil, LLP
- Priority: FR2110247 20210929
- Main IPC: G11C7/06
- IPC: G11C7/06 ; G11C7/04 ; G11C7/10

Abstract:
In an embodiment an integrated circuit includes a non-volatile memory having a plurality of memory cells, wherein each memory cell is configured to store information, and wherein each memory cell is configured to provide a reading current having an intensity dependent on a value stored in the memory cell when the memory cell is selected for reading; and a sense amplifier including a first amplifier configured to amplify the reading current of each memory cell selected for reading, an oscillation generator configured to generate on basis of the amplified signal a signal having oscillations according to a frequency dependent on the intensity of the current of the amplified signal, a counter configured to count the oscillations of the signal generated by the oscillation generator over at least one given period of time and a digital processing circuit configured to determine a value represented by the amplified signal on basis of the value counted during the at least one given period of time using a lookup table between values countable by the counter and values representable by the amplified signal.
Public/Granted literature
- US20230100872A1 INTEGRATED CIRCUIT COMPRISING A NON-VOLATILE MEMORY Public/Granted day:2023-03-30
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