Invention Grant
- Patent Title: Semiconductor structure and method for forming the same
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Application No.: US18190328Application Date: 2023-03-27
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Publication No.: US12148657B2Publication Date: 2024-11-19
- Inventor: Chien-Han Chen , Shih-Yu Chang , Chien-Chih Chiu , Yi-Tang Chen , Da-Wei Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: FOLEY & LARDNER LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.
Public/Granted literature
- US20240332069A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2024-10-03
Information query
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