Invention Grant
- Patent Title: Power semiconductor package unit of surface mount technology including a plastic film covering a chip
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Application No.: US17543872Application Date: 2021-12-07
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Publication No.: US12148675B2Publication Date: 2024-11-19
- Inventor: Chung-Hsiung Ho , Wei-Ming Hung , Wen-Liang Huang , Shun-Chi Shen , Chien-Chun Wang , Chi-Hsueh Li
- Applicant: Panjit International Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Panjit International Inc.
- Current Assignee: Panjit International Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Best & Flanagan LLP
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/00 ; H01L23/48
Abstract:
The present invention includes a chip, a plastic film layer, and an electroplated layer. A front side and a back side of the chip each comprises a signal contact. The plastic film layer covers the chip and includes a first via and a second via. The first via is formed adjacent to the chip, and the second via is formed extending to the signal contact of the front side. A conductive layer is added in the first and the second via. The conductive layer in the second via is electrically connected to the signal contact of the front side. Through the electroplated layer, the signal contact on the back side is electrically connected to the conductive layer in the first via. The conductive layer protrudes from the plastic film layer as conductive terminals. The present invention achieves electrical connection of the chip without using expensive die bonding materials.
Public/Granted literature
- US20220344228A1 Power Semiconductor Package Unit of Surface Mount Technology and Manufacturing Method Thereof Public/Granted day:2022-10-27
Information query
IPC分类:
