Invention Grant
- Patent Title: Backside interconnect structures for semiconductor devices and methods of forming the same
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Application No.: US17815112Application Date: 2022-07-26
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Publication No.: US12159869B2Publication Date: 2024-12-03
- Inventor: Cheng-Ting Chung , Hou-Yu Chen , Ching-Wei Tsai
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/762 ; H01L23/50 ; H01L27/06 ; H01L29/06 ; H01L29/417 ; H01L29/66 ; H01L29/78

Abstract:
Backside interconnect structures having reduced critical dimensions for semiconductor devices and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure over a front-side of a substrate; a first backside interconnect structure over a backside of the substrate, the first backside interconnect structure including first conductive features having tapered sidewalls with widths that narrow in a direction away from the substrate; a power rail extending through the substrate, the power rail being electrically coupled to the first conductive features; and a first source/drain contact extending from the power rail to a first source/drain region of the first transistor structure.
Public/Granted literature
- US20220367454A1 Backside Interconnect Structures for Semiconductor Devices and Methods of Forming the Same Public/Granted day:2022-11-17
Information query
IPC分类: