Invention Grant
- Patent Title: Circuitry including a level shifter and logic, configured to receive a power up reset signal, and associated methods, devices, and systems
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Application No.: US17457570Application Date: 2021-12-03
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Publication No.: US12165693B2Publication Date: 2024-12-10
- Inventor: Hiroshi Akamatsu , Yantao Ma
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: G11C11/408
- IPC: G11C11/408 ; G11C11/4093 ; H03K3/037 ; H03K19/0185

Abstract:
A device may include a level shifter including an at least one input and at least one output. The device may also include a logic circuit coupled to an output of the at least one output of the level shifter and configured to receive a power up reset signal. The logic circuit may be configured to isolate an output of the logic circuit from a supply voltage responsive to the power up reset signal and during at least a portion of a power up sequence. Associated circuits, systems, and methods are also disclosed.
Public/Granted literature
- US20230178141A1 CIRCUITRY INCLUDING A LEVEL SHIFTER AND LOGIC, AND ASSOCIATED METHODS, DEVICES, AND SYSTEMS Public/Granted day:2023-06-08
Information query
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