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Invention Grant
US12183788B2 Semiconductor arrangement comprising a source pad, gate pad, drain pad, backside interconnect line, and backside contact, and backside conductive line and method of making 有权

Semiconductor arrangement comprising a source pad, gate pad, drain pad, backside interconnect line, and backside contact, and backside conductive line and method of making
Abstract:
A method of forming a semiconductor arrangement includes forming a first source pad over a semiconductor layer. A first nanosheet is formed contacting the first source pad. A gate pad is formed adjacent the first nanosheet. A first drain pad is formed over the gate pad and contacting the first nanosheet. A backside interconnect line is formed under the gate pad and the first source pad. A first backside contact is formed contacting at least one of the backside interconnect line, the first source pad, or the gate pad.
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