Invention Grant
- Patent Title: Semiconductor memory device of vertical channel structure and method of manufacturing the same
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Application No.: US17543496Application Date: 2021-12-06
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Publication No.: US12185541B2Publication Date: 2024-12-31
- Inventor: Jae Young Oh , Dong Hwan Lee , Eun Seok Choi
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si Gyeonggi-do
- Agency: WILLIAM PARK & ASSOCIATES LTD.
- Priority: KR10-2021-0076987 20210614
- Main IPC: H10B43/27
- IPC: H10B43/27 ; H10B41/27 ; H10B41/30 ; H10B43/30

Abstract:
A semiconductor memory device, and a method of manufacturing the same, includes a gate stack including an interlayer insulating layers and conductive patterns alternately stacked in a vertical direction on a substrate, a channel structure passing through the gate stack and having an upper end protruding above the gate stack, a memory layer surrounding a sidewall of the channel structure, and a source layer formed on the gate stack. The channel structure includes a core insulating layer extending in a central region of the channel structure in the vertical direction, and a channel layer surrounding a sidewall of the core insulating layer, the channel layer formed to be lower in the vertical direction than the core insulating layer and the memory layer.
Public/Granted literature
- US20220399366A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2022-12-15
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