Invention Grant
- Patent Title: MRAM MTJ with directly coupled top electrode connection
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Application No.: US17528574Application Date: 2021-11-17
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Publication No.: US12185640B2Publication Date: 2024-12-31
- Inventor: Sheng-Chau Chen , Cheng-Tai Hsiao , Cheng-Yuan Tsai , Hsun-Chung Kuang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H10N50/80
- IPC: H10N50/80 ; H10B61/00 ; H10N50/01

Abstract:
Some embodiments relate to an integrated chip. The integrated chip includes a memory cell over a substrate, where the memory cell comprises a data storage structure. A conductive interconnect is over the data storage structure and comprises a first protrusion adjacent to a first side of the data storage structure, where the first protrusion comprises a flat bottom surface. A spacer structure is disposed on the first side of the data storage structure. The spacer structure directly contacts the flat bottom surface of the first protrusion.
Public/Granted literature
- US20220077385A1 TECHNIQUES FOR MRAM MTJ TOP ELECTRODE CONNECTION Public/Granted day:2022-03-10
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