Invention Grant
- Patent Title: Integrated circuit comprising trenches formed in a substrate
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Application No.: US18127751Application Date: 2023-03-29
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Publication No.: US12198973B2Publication Date: 2025-01-14
- Inventor: Franck Julien , Abderrezak Marzaki
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy LLC
- Priority: FR1911549 20191016
- Main IPC: H01L25/16
- IPC: H01L25/16 ; H01L21/02 ; H01L21/306 ; H01L21/308 ; H01L21/311 ; H01L21/762 ; H01L25/18

Abstract:
Trenches of different depths in an integrated circuit are formed by a process utilizes a dry etch. A first stop layer is formed over first and second zones of the substrate. A second stop layer is formed over the first stop layer in only the second zone. A patterned mask defines the locations where the trenches are to be formed. The dry etch uses the mask to etch in the first zone, in a given time, through the first stop layer and then into the substrate down to a first depth to form a first trench. This etch also, at the same time, etch in the second zone through the second stop layer, and further through the first stop layer, and then into the substrate down to a second depth to form a second trench. The second depth is shallower than the first depth.
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