Invention Grant
- Patent Title: Gate structures for tuning threshold voltage
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Application No.: US17810799Application Date: 2022-07-05
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Publication No.: US12205850B2Publication Date: 2025-01-21
- Inventor: Yen-Yu Chen , Chung-Liang Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: HAYNES AND BOONE, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/033 ; H01L27/092 ; H01L29/06 ; H01L29/49 ; H01L29/78

Abstract:
A semiconductor device includes a first gate structure that includes a first interfacial layer, a first gate dielectric layer disposed over the first interfacial layer, and a first gate electrode disposed over the first gate dielectric layer. The semiconductor device also includes a second gate structure that includes a second interfacial layer, a second gate dielectric layer disposed over the second interfacial layer, and a second gate electrode disposed over the second gate dielectric layer. The first interfacial layer contains a different amount of a dipole material than the second interfacial layer.
Public/Granted literature
- US20220336291A1 NOVEL GATE STRUCTURES FOR TUNING THRESHOLD VOLTAGE Public/Granted day:2022-10-20
Information query
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