- Patent Title: Methods used in forming a memory array comprising strings of memory cells including forming a pair of elevationally-extending walls that are laterally-spaced relative one another and that are individually horizontally-longitudinally-elongated
-
Application No.: US17231895Application Date: 2021-04-15
-
Publication No.: US12211746B2Publication Date: 2025-01-28
- Inventor: Anilkumar Chandolu , Indra V. Chary
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/535 ; H10B41/27 ; H10B43/27

Abstract:
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers. Horizontally-elongated trenches are formed into the stack to form laterally-spaced memory-block regions. The memory-block regions comprise part of a memory-plane region. A pair of elevationally-extending walls are formed that are laterally-spaced relative one another and that are individually horizontally-longitudinally-elongated. The pair of walls are one of (a) or (b), where: (a): in the memory-plane region laterally-between immediately-laterally-adjacent of the memory-block regions; and (b): in a region that is edge-of-plane relative to the memory-plane region. Through the horizontally-elongated trenches and after forming the pair of walls, sacrificial material that is in the first tiers is isotropically etching away and replaced with conducting material of individual conducting lines. Other embodiments, including structure independent of method, are disclosed.
Public/Granted literature
- US20220336278A1 Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells Public/Granted day:2022-10-20
Information query
IPC分类: