Invention Grant
- Patent Title: Systems and methods for signal isolation in power converters
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Application No.: US18408464Application Date: 2024-01-09
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Publication No.: US12212440B2Publication Date: 2025-01-28
- Inventor: Vincent Dessard , Aimad Saib
- Applicant: Navitas Semiconductor Limited
- Applicant Address: IE Dublin
- Assignee: Navitas Semiconductor Limited
- Current Assignee: Navitas Semiconductor Limited
- Current Assignee Address: IE Dublin
- Agency: FisherBroyles, LLP
- Main IPC: H04L25/02
- IPC: H04L25/02

Abstract:
A circuit is disclosed. The circuit includes a transmitter having an input terminal arranged to receive input data and a transmission node arranged to transmit intermediate data corresponding to the input data, and a receiver having a receive node arranged to receive the intermediate data and an output terminal arranged to produce output data corresponding to the input data, the receiver further including a dV/dt detector circuit coupled to the receive node and arranged to stop the production of the output data at the output terminal when the dV/dt detector circuit detects a rate of change of voltage with respect to time greater than a predetermined threshold.
Public/Granted literature
- US20240235384A1 SYSTEMS AND METHODS FOR SIGNAL ISOLATION IN POWER CONVERTERS Public/Granted day:2024-07-11
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