A wafer defect detection apparatus and a method of fabricating an IC using the same. Images of a plurality of semiconductor wafers forming a wafer lot are captured at a targeted process step of a fabrication flow and preprocessed, wherein a medoid image is identified as a reference wafer image. In one arrangement, preprocessed wafer images of a semiconductor wafer lot may be analyzed for defects based on an ensemble of image analysis techniques using at least one of the reference wafer image from the wafer lot and a template patch to enhance the predictive power of defect detection.