HEMT transistor with improved gate arrangement
Abstract:
A HEMT GaN transistor with a conductive gate including an upper metal region, and a lower semi-conductor region provided to lower current gate leakage. The lower semiconductor region is formed of: a first sub-region that is P-doped and in contact with the metal region, a second sub-region that is P-doped and in contact with the second layer, and an intermediate sub-region arranged between the first sub-region and the second sub-region, the third sub-region being un-doped or unintentionally doped or doped with a low concentration of dopant compared to that of the first sub-region and second sub-region, respectively.
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